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SC16315S
VFD CONTROLLER/DRIVER
DESCRIPTION
SC16315S is a Vacuum Fluorescent Display (VFD) Controller driven on a 1/4 to 1/8 duty factor. It has eight segment output lines, 4 grid output lines, 4 segment/grid output drive lines, one display memory, control circuit, key scan circuit, those above are all incorporated into a single chip to build a highly reliable peripheral device for a single chip micro computer. SOP Package. Serial data is fed to
SOP-28-375-1.27
SC16315S via a three-line serial interface. It is housed in a 28-pin,
FEATURES
* CMOS Technology * Low Power Consumption * Key Scanning (8 x 2 matrix) * Multiple Display Modes: (8 Segments, 8 Digits to 12 Segments, 4 Digits) * 8-Step Dimming Circuitry * Serial Interface for Clock, Data Input, Data Output, Strobe Pins * No External Resistors Needed for Driver Outputs * Available in 28-pin, SOP Package * Microcomputer peripheral device
ORDERING INFORMATIONS
Device SC16315S Package SOP-28-375-1.27
APPLICATIONS
BLOCK DIAGRAM
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SC16315S
ABSOLUTE MAXIMUM RATING (unless otherwise stated, Tamb=25C, GND=0V)
Characteristic Logic Supply Voltage Driver Supply Voltage Logic Input Voltage VFD Driver Output Voltage VFD Driver Output Current Symbol VDD VEE VI Vo IOVFD Value -0.5 ~ +7 VDD + 0.5 ~ VDD - 40 -0.5 ~ VDD + 0.5 VEE - 0.5 ~ VDD + 0.5 -40(Grid) -15(Segment) Unit V V V V mA
RECOMMENDED OPERATING RANGE (Unless otherwise stated, Tamb=-20 ~ 70 C, GND=0V)
Characteristic Logic Supply Voltage High-Level Input Voltage Low-Level Input Voltage Driver Supply Voltage Symbol VDD VIH VIL VEE Min. 4.5 0.7 VDD 0 VDD-35 Typ. 5 ---Max. 5.5 VDD 0.3VDD 0 Unit V V V V
ELECTRICAL CHARACTERISTICS
(Unless otherwise stated, Tamb=25 C, VDD =5V, GND=0V, VEE=VDD-35V) Characteristic Low -Level Output Voltage High-Level Output Current High-Level Output Current High-Level Input Voltage Low-Level Input Voltage Oscillation Frequency Input Current Dynamic Current Consumption Symbol Test conditions VO=VDD-2V, GR1 to GR4, SG9/GR8 to SG12/GR5 VO=VDD-2V, SG1/KS1 to SG8/KS8 --R=100K VI=VDD or VSS Under no load, display off Min. --15 -3 0.7VDD -350 --Typ. -----500 --Max. 0.4 ---0.3VDD 650 1 5 Unit V mA mA V V kHz A mA VOLDOUT DOUT, IOLDOUT =4mA IOHGR IOHSG VIH VIL fosc II IDDdyn
ELECTRICAL CHARACTERISTICS
(Unless otherwise stated, Tamb=25 C, VDD =3.3V, GND=0V, VEE=VDD-35V) Characteristic Low -Level Output Voltage High-Level Output Current High-Level Output Current Symbol VOLDOUT IOHGR IOHSG Test conditions DOUT, IOLDOUT =4mA VO=VDD-2V, GR1 to GR4, SG9/GR8 to SG12/GR5 VO=VDD-2V, SG1/KS1 to SG8/KS8 Min. --6 -1.5 Typ. ---Max. 0.4 --Unit V mA mA
(To be continued)
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SC16315S
(Continued) Characteristic High-Level Input Voltage Low-Level Input Voltage Oscillation Frequency Input Current Dynamic Current Consumption Symbol VIH VIL fosc II IDDdyn --R=100K VI=VDD or VSS Under no load, display off Test conditions Min. 0.7 VDD VSS 350 --Typ. --500 --Max. VDD 0.3VDD 650 1 3 Unit V V kHz A mA
PIN DESCRIPTION
Pin No. 1 2 3, 4 5, 25 6, 24 7~14 15 16~19 20~23 26 27 28 Pin Name CLK STB K1 to K2 VSS VDD SG1/KS1 to SG8/KS8 VEE SG9/GR8 to SG12/GR5 GR4 to GR1 OSC DOUT DIN data at the falling edge. Serial interface strobe pin. The data input after the STB has fallen is processed as a command. When this pin is" HIGH" CLK is ignored. , Key data input pins. At the end of the display cycle, the data sent to these pins are latched. Logic ground pin Logic power supply High voltage segment output pins also acts as the key source. Pull down level. High voltage segment/Grid output pins. High voltage Gird output pins Oscillator input pin. Determining the oscillation frequency by a resistor which is connected to this pin and GND (VSS). Data output pin (N-channel, open drain) this pin outputs serial data at the falling edge of the shift clock (starting from the lower bit). Data input pin. This pin inputs serial data at the rising edge of the shift clock (starting from the lower bits). Description Clock input pin. This pin reads serial data at the rising edge and outputs
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SC16315S
FUNCTIONAL DESCRIPTION
Commands
Commands determine the display mode and status of SC16315S. A command is the first byte (b0 to b7) inputted to SC16315S via the DIN Pin after STB Pin has changed from " HIGH"to " LOW"State. For some reason, if STB Pin is set to " HIGH"while data or commands are being transmitted, the serial communication is initialized, and the data/commands being transmitted are considered invalid. COMMAND1: Display mode setting commands SC16315S provides 4 display mode settings as shown in the diagram below: As stated earlier a command is the first one byte (b0 to b7) transmitted to SC16315S via the DIN Pin when STB is "LOW" However, for these . commands, the bits 5 to 6 (b4 to b5) are ignored, bits 7 & 8 (b6 to b7) are given a value of " . 0" The Display Mode Setting Commands determine the number of segments and grids to be used (1/4 to 1/8 duty, 12 to 8 segments). The display will be forcibly turned off and the key scanning will stop when these commands are executed. In order to resume display, a display command " ON"must be executed. If the same mode setting is selected, no command execution is take place, therefore, nothing happens. When Power is turned " , the 8-digit, 8-segment mode is selected. ON" Figure 3: display mode settings
MSB 0 0 b3 b2 b1 LSB b0
Display mode settings Don't relevant 0000: 4 digits, 12 segments 0011: 5 digits, 11 segments 0100: 6 digits, 10 segments 0101: 7 digits, 9 segments 0110: 8 digits, 8 segments
COMMAND 2: Data setting commands The Data Setting Commands executes the Data Write or Data Read Modes for SC16315S. The Data Setting Command, the bits 5 and 6 (b4, b5) are ignored, bit 7 (b6) is given the value of " while bit 8 (b7) is given the 1" value of " . Please refer to the diagram below. 0" When power is turned ON, the bit 4 to bit 1 (b3 to b0) are given the value of " . 0"
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SC16315S
Figure 4: data settings
MSB 0 1 b3 b2 b1 b0 LSB
Don't relevant
Data write & read mode settings: 00: Write data to display mode 01: Irrelevant 10: Read key data 11: Irrelevant Address increment mode settings(display mode): 0: Increments address after data has been written 1: Fixes address Mode settings: 0: Normal operation mode 1: Test mode
COMMAND 3: Address setting commands Address Setting Commands are used to set the address of the display memory. The address is considered valid if it has a value of " 00H"to " 1DH" The data is ignored until a valid address is set if the address is set to 1EH . or higher. When power is turned ON, the address is set at " 00H" . Please refer to the diagram below. Figure 5: address settings
MSB 1 1 0 b4 b3 b2 b1 b0 LSB
Address: 00H to 1DH
COMMAND 4: Display control commands The Display Control Commands are used to turn ON or OFF a display. It also used to set the pulse width. Please refer to the diagram below. When the power is turned ON, a 1/16 pulse width is selected and the displayed is turned OFF (the key scanning is stopped). Figure 6: display control settings
MSB 1 0 b3 b2 b1 b0 LSB
Dimming quantity settings: Don't relevant 000: Set pulse width to 1/16 001: Set pulse width to 2/16 010: Set pulse width to 4/16 011: Set pulse width to 10/16 100: Set pulse width to 11/16 101: Set pulse width to 12/16 110: Set pulse width to 13/16 111: Set pulse width to 14/16 Display settings: 0: Display off(key scan continues) 1: Display on
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SC16315S
Display mode and RAM address
Data transmitted from an external device to SC16315S via the serial interface are stored in the Display RAM and are assigned addresses. The RAM Addresses of SC16315S are given below in 8 bits unit. Figure 7:SC16315S RAM address SG1 00H 03H 06H 09H 12H 15H 18H 1BH SG4 SG5 SG8 SG9 01H 04H 07H 0AH 13H 16H 19H 1CH 02H 05H 08H 0BH 14H 17H 1AH 1DH SG12 DGT1 DGT2 DGT3 DGT4 DGT5 DGT6 DGT7 DGT8
Figure 8: SC16315S written RAM data bytes
Note: X=don'care t
Key matrix & Key-input data storage ram
The key matrix is made up of 8x 2 arrays as shown below: Figure 9: SC16315S key matrix
K1 K2 SG1/KS1 SG2/KS2 SG3/KS3 SG4/KS4 SG5/KS5 SG6/KS6 SG7/KS7 SG8/KS8
Each data entered by each key is stored as follows. They are read by a READ Command, starting from the last significant bit. When the most significant bit of the data (SG1, b0) has been read, the least significant bit of the next data (SG8, b7) is read. Figure 10: SC16315S key input data storage K1... ... ... K2 SG1/KS1 * SG5/KS5 b0 ------- b1 K1... ... ... . K2 K1... ... ... ... .K2 SG2/KS2 * SG6/KS6 b2 ------- b3 SG3/KS3 * SG7/KS7 b4-------- b5 K1... ... ... ... ..K2 SG4/KS4 * SG8/KS8 b6 -------- b7 Reading sequence
Note: *=These sections are not relevant but are needed to read the transmission clock.
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SC16315S
KEY SCANNING AND DISPLAY TIMING
The Key Scanning and display timing diagram is given below. One cycle of key scanning consists of 2 frames. The data of the 8 x 2 matrix is stored in the RAM. Figure 11: SC16315S scanning & display timing diagram
SERIAL COMMUNICATION FORMAT
The following diagram shows the SC16315S serial communication format. The DOUT Pin is an N- channel, open-drain output pin; therefore, it is highly recommended that an external pull-up resistor (1 K to 10 K) must be connected to DOUT. Figure 12: SC16315S serial communication format Reception (command/data write)
If data continues STB
DIN
b0
b1
b2
b6
b7
CLK
1
2
3
7
8
Transmission (data read)
STB DIN CLK DOUT 1 b0 2 b1 3 b2 4 b3 5 b4 6 b5 7 b6 8 tWAIT b0 b1 b2 b3 b4 b5 b7 1 2 3 4 5 6
Data read command is set.
Data reading starts
Where: twait (waiting time) 1s. It must be noted that when the data is read, the waiting time (twait) between the rising of the eighth clock that has set the command and the falling of the first clock that has read the data is greater or equal to 1s.
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SC16315S
SWITCHING CHARACTERISTIC WAVEFORM
SC16315S switching characteristics waveform is given below. Figure 13: SC16315S switching characteristic waveform
fOSC
OSC
50%
PWSTB STB PWCLK CLK PWCLK
tCLK-STB
tSETUP
DIN
tHOLD
tPZL
DOUT
tPZL
tTHZ
Sn/Gn 90% 10%
tTZH
Where: PW CLK(clock pulse width)400ns t setup(data setup time) 100ns tCLK-STB (clock-strobe time) 1s tTZH2 (grid rise time) 0.5s(at VDD=5V) tTZH2 (grid rise time) 1.0s(at VDD=3.3V) tTZH1 (segment rise time) 2.0s(at VDD=5V) tTZH1 (segment rise time) 3.0s(at VDD=3.3V)
PW STB(strobe pulse width) 1s thold (data hold time) 100ns tTHZ (fall time)150s tPZL (propagation delay time)100ns tPLZ (propagation delay time) 400ns fosc=oscillation frequency
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SC16315S
APPLICATIONS
Display memory is updated by incrementing addresses. Please refer to the following diagram. Figure 14: display memory updated by address increments
STB
CLK
DIN
Command 2
Command 3
Data 1
Data n
Command 1
Command 4
where : Command1: display mode setting command Command2: data setting command Command3: address setting command Data 1 to n: transfers display data (24 bytes max.) Command4: display control command The following diagram shows the waveforms when updating specific addresses. Figure 15: address update.
STB
CLK
DIN
Command 2
Command 3
Data
Command 3
Data
Where: Command 2-- data setting command Command 3-- address setting command Data-- display data
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SC16315S
RECOMMENDED SOFTWARE FLOWCHART
Figure 17: recommended software flowchart
Note: 1. Command 1: Display Mode Commands 2. Command 2: Data Setting Commands 3. Command 3: Address Setting Commands 4. Command 4: Display Control Commands 5. When IC power is applied for the first time, the contents of the Display RAM are not defined; thus, it is strongly suggested that the contents of the Display RAM must be cleared during the initial setting.
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SC16315S
TYPICAL APPLICATION CIRCUIT
VDD 10K
1 CLK
DIN 28 DOUT 27 OSC 26 VSS 25
0.1F
MCU
2 STB 3 K1 4 K2 VDD 5 VSS 6 VDD 7 SG1/KS1 8 SG2/KS2 9 SG3/KS3 10 SG4/KS4 11 SG5/KS5 12 SG6/KS6 13 SG7/KS7 14 SG8/KS8
82K
VDD 24 VDD GR1 23 GR2 22 GR3 21 GR4 20 SG12/GR5 19 SG11/GR6 18 SG10/GR7 17 SG9/GR8 16 VEE 15 VEE G8 G7 G6 G5 G4 G3 G2 G1
SC16315S
8-GRID X 8- SEGMENT VFD
S8 S7 S6 S5 S4 S3 S2 S1
10K 10K
1N4148 X 8
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SC16315S
PACKAGE OUTLINE
SOP-28-375-1.27 UNIT: mm
10.20.4
7.60.3
HANDLING MOS DEVICES:
Electrostatic charges can exist in many things. All of our MOS devices are internally protected against electrostatic discharge but they can be damaged if the following precautions are not taken: * Persons at a work bench should be earthed via a wrist strap. * Equipment cases should be earthed. * All tools used during assembly, including soldering tools and solder baths, must be earthed. * MOS devices should be packed for dispatch in antistatic/conductive containers.
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9.525

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